High voltage (HV) transistors are used for various applications, including non-volatile memory (NVM) devices. An important aspect of HV transistors is the gate oxide breakdown voltage (BV). The BV should be sufficiently high to enable reliable operation of the HV transistor. Furthermore, the BV of the transistors should result in a relatively tight BV spread across chips of a wafer and from wafer to wafer. Having a tight spread is particularly important in the case of NVM devices. A tight BV spread allows a NVM device to have a larger operating window and better yield.
However, as process technology advances, devices become narrower. Narrow devices, for example, at the 40 nm node or below, have been observed to suffer from wide BV spread. The wide BV spread negatively impacts the operating window of HV transistors.
From the foregoing discussion, it is desirable to provide HV transistors with tight BV spread.